There is generally known a device called a logic tracer which is constructed to store the past record of information generated in a time sequence from an electronic apparatus, such as an information processing system or the like. This invention relates to the improvement of the past record storing method in which such a logic tracer is employed.
When an erroneous operation is detected in the information processing system, the same operation is again repeated. If the repeated operation is not successful, the apparatus is considered to be defective and its operation is stopped, or the defective part is checked while the apparatus is being operated. Even if no defective part is detected, it is also necessary to test the operation of each part for proper maintenance and adjustment.
Upon examination of any trouble, using a maintenance operation or logic operation, holding the results of the logical processing and storing the past record of different kinds of information are effective to confirm normal operation, as well as to search for the cause of a defective operation or find the location of a defect in the system.
To this end, in the information processing system as, for example, shown in FIG. 1, a logic tracer 5 is connected to the IO interface line 3 between the central processing unit (CPU) 1 and the magnetic tape control unit 2 for controlling a plurality of magnetic tape decks 4, so as to store different kinds of instructions and the past record of various information signals sent from the magnetic tape control unit 2 to the CPU 1.
FIG. 2 is a block diagram of the logic tracer 5. This logic tracer 5 has a probe 11 for coupling the tracer 5 to the IO interface line 3, a memory 12 for storing the trace information, a memory address register 13 for holding the write address or read address for trace information, a write allowance latch 16 set by a start signal 14, and reset by a stop signal 15, a counter 17, a write register 18 for holding a sampled input data, read timing generator 19 for generating the read timing signal for the memory 12, a write timing generator 20 for generating the write timing signal to the memory 12, and a read register 21 for holding the read data.
Until the start signal is changed to the on-state, the allowance latch 16 is reset so that a reset signal 22 is not applied to the counter 17 and a write signal 23 is not applied to the memory 12. When the start signal 14 is changed to the on-state, the allowance latch 16 is set to open an AND gate 28 in synchronism with a sampling signal 29, allowing the counter 17 to be incremented and the memory 12 to write. In this case, input data 24 is stored in the write register 18 in synchronism with the sampling signal 29, and an address signal 27 on an output 26 of the counter 17 is applied to the memory 12 so that the memory 12 stores the contents of the input data 24.
In FIG. 2, the memory 12 may be a special memory for the external or a memory region for exclusive use of maintenance which is incorporated in an external unit (for example, magnetic disk control unit).
Moreover, in FIG. 2, the data read from the memory 12 is applied to an external visible display DPL, and the visible output thereof is watched by a maintenance or adjustment operator.
The conventional information recording methods using the logic tracer 5 will now be explained.
Let us assume that information to be stored in the memory 12 includes IO addresses and commands supplied from the CPU 1 to the magnetic tape control unit 2 and IO status supplied from the magnetic tape control unit 2 to the CPU 1, and that the different IO addresses are nine in number A1 to A9, the different commands are nine in number B1 to B9 and the different IO status information is nine in number C1 to C9.
An example shown in FIG. 3 corresponds to the case where there are a set of three information items including the IO address and command supplied from the CPU and the IO status corresponding thereto and these are successively stored in the memory for each IO control operation of the CPU. In FIG. 3, the numerals 1 to 58 shown in the left column represent the number of the control operations by the CPU and the right column represents a set of information items stored in the memory. According to the method of FIG. 3 of storing all the information, however, if the same control operation is repeatedly performed as in, for example, a continuous reading operation in a magnetic tape, the information of quite identical contents must be repeatedly stored in the memory, as shown in FIG. 3 as the eighth to fifty-seventh storing operations, thereby resulting in wasteful use of the memory area.
FIG. 4a shows a method for increasing the use efficiency of the memory, in which the recording in a memory is made only when the information combination in a set of newly-generated information items is different from that in a set of information items previously stored in the memory. According to the method shown in FIG. 4a, it is not necessary to store redundant information in FIG. 3 generated repeatedly in the ninth to fifty-seventh control operations which involve the same information combination as the information (A8, B8, C8) to be stored in the eighth control operation. However, which control operation has been repeated, cannot be determined from the contents stored in the memory. Therefore, the correct search of the system operation upon the occurrence of an erroneous or defective operation is impossible. Further, the method shown in FIG. 4a cannot provide a complete elimination of the recording of redundant information since even when only one of the information items in a given set changes, all the information in that set is stored in a three-byte area of the memory.
FIG. 4b shows another method for increasing the use efficiency of the memory, in which a memory is provided with storage regions associated with respective information items of the same kind, and the number of times each information item is generated is stored in the associated storage region. According to this method, trace information can be stored in a limited memory area irrespective of the number of times of occurrence of the control operations. But, a sequential change of control operations cannot be examined, as is apparent from FIG. 4b.